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British computing technology company Signaloid today announced the release of the Signaloid Compute Engine Amazon Machine Image (AMI) via AWS Marketplace. The release enables organizations to deploy Signaloid’s distribution-extended compute hardware (UxHw®) technology within their Amazon Virtual Private Clouds (VPCs). The AMI provides access to UxHw, which delivers orders-of-magnitude performance improvements on x86_64 and ARM (AArch64) AWS Elastic Compute Cloud (EC2) instances. Without requiring software rewrites, UxHw enables existing applications to compute directly on probability distributions, automating algorithms such as Monte Carlo methods in finance and physics, importance sampling in reinforcement learning, and particle filters in physical AI and robotics. The technology works through binary translation and optimization at the LLVM intermediate representation (LLVM IR) level, with optional hardware acceleration via FPGAs and Signaloid’s C0-ASIC that was recently taped-out in an ultra-low-power TSMC process. Examples of performance achieved with the AMI include 430-fold speedup for Value at Risk (using geometric Brownian motion) and up to 580-fold speedup for Heath-Jarrow-Morton swaptions pricing. For organizations who currently use AWS infrastructure and want to benefit from UxHw combined with the familiarity of AWS tools, the AMI permits rapid deployment to EC2/On-Premises compute instances to benefit from UxHw. Organizations also have the option to deploy applications to Signaloid’s managed compute infrastructure, which has ISO/IEC 27001:2022 certification and SOC 2 Type II attestation. The Signaloid Compute Engine AMI is available through the AWS Marketplace.

British AI hardware company Signaloid will preview its recently-taped-out ASIC for physical AI at Bosch Connected World, from 10th–11th June 2026, in Berlin. The ASIC is complementary to Signaloid’s edge hardware modules which are already achieving over 37-fold speedup for algorithms used in physical AI and robotics. Cambridge UK, 9th June 2026 — British computing technology company Signaloid will preview its C0-ASIC for physical AI this week at Bosch Connected World, taking place from 10th-11th June, in Berlin. Designed for robotics, industrial automation, and probabilistic AI workloads, the ASIC is projected to deliver up to 1000× better performance-per-Watt than existing state-of-the-art approaches. Signaloid’s distribution-extended compute hardware (UxHw®) is already available for use in physical AI/robotics as a family of hardware modules, as well as via a virtualization- and binary-translation-based solution. UxHw enables autonomous mobile robots (AMRs) to improve their navigation algorithms for safer and faster navigation in factories. It similarly enables industrial programmable logic controllers (PLCs) to achieve better predictive maintenance. Why Physical AI and robotics needs different compute Many of the important algorithms enabling robotics and AI today require compute-intensive GPUs or similar hardware. They often involve algorithms that must evaluate hundreds of thousands or even millions of possible scenarios each second, from estimating a robot’s position to tracking a drone in space. Because these scenarios are not equally likely, today’s processors rely on repeated computations to approximate the ideal solutions. If AI hardware could however consider all the possible scenarios when handling any single value, that could enable everything from more efficient AI datacenters to more agile robots and safer autonomous mobility. A new kind of compute hardware Instead of single numbers, UxHw can represent values as arbitrary non-uniform ranges (i.e., probability distributions) and performs computation directly on this digital form, without requiring significant software changes. A single execution of traditional software on a UxHw-enabled computing platform can therefore deliver what classical iteration-based methods need millions of repetitions to approximate. In competitive benchmarking against the latest high-end computing platforms, UxHw already delivers 1000-fold speedups, with further gains expected from Signaloid’s C0-ASIC. What the ASIC will enable “The compute workloads that Signaloid’s UxHw is designed for, are used across many aspects of computing, from physical AI and robotics, to supply-chain modeling, logistics, and quantitative finance”, says Phillip Stanley-Marbell, founder and CEO of Signaloid. Even before availability of the C0-ASIC, cloud- and FPGA-based implementations of Signaloid’s UxHw are already demonstrating speedups of over 600-fold for infrared sensor data analysis and over 37-fold for particle filter sensor fusion algorithms. The C0-ASIC will complement Signaloid’s existing hardware modules, which are available for use with a range of industrial applications including for integration with the Bosch Rexroth’s ctrlX core X2 and core X3 PLCs.

Signaloid previews a new ASIC purpose-built for physical AI and robotics workloads. The chip, taped out with TSMC in partnership with IC-Link by imec and Cadence, is projected to deliver up to 1000× better performance-per-Watt in key physical AI workloads. Built on Signaloid’s UxHw® technology, the ASIC complements the company’s cloud platform and FPGA-based hardware modules, which already deliver major speedups for quantitative finance and engineering simulations. Signaloid (https://signaloid.com), a computing platform company providing hardware and binary-translation-based acceleration of AI, robotics, aerospace, and quantitative finance workloads, today announced the tapeout and preliminary specifications documents for its C0-ASIC. Delivery of engineering samples to the first customer is due in Q3 2026, and additional FPGA-based systems implementing the ASIC’s register-transfer-level (RTL) design are under discussion for deployment in the UK and Switzerland later in 2026. The new ASIC and the FPGA-based accelerators complement Signaloid’s existing hardware starter modules (available through electronics distributor Mouser) and cloud-hosted implementations of its technology, already being used or evaluated in aerospace, quantitative finance, and high-performance physics simulations. The C0-ASIC was targeted specifically at energy-efficient physical AI workloads. The UK Advanced Research and Invention Agency (ARIA) will take delivery of systems based on the ASIC for use in next-generation AI workloads such as second order methods. “The Scaling Compute program at ARIA commissioned several innovative technology prototypes pursuing unconventional ideas to design new AI accelerators”, says ARIA Program Director Suraj Bramhavar. “We commissioned Signaloid’s C0-ASIC for evaluation in randomized numerical linear algebra and probabilistic computing workloads. We believe randomized linear algebra represents a fundamentally new and powerful technique underpinning many applications in computer science including AI, and exploiting these principles in hardware could provide an entirely new vector for improved performance. We are excited to invest behind this theme, in partnership with Signaloid, to explore its full potential.” A Different Kind of AI Compute Accelerator The C0-ASIC implements Signaloid’s distribution-extended compute hardware (UxHw®) technology. Unlike conventional CPUs and GPUs, which use impressive amounts of sheer compute force across thousands of compute cores, to solve problems that require iterative randomized variations, Signaloid’s UxHw builds on new mathematical techniques to restructure computations, dynamically, to achieve the same results while often using 1000-fold (or more) less energy. Signaloid has already deployed implementations of UxHw using a combination of binary translation and FPGA-based hardware implementation, ahead of custom silicon availability. Implementations for robotics applications are available through Mouser, with demonstrated performance improvements of, e.g., over 37-fold for robotics particle filter algorithms. Implementations for large-scale workloads are available today through Amazon Web Services (AWS), and have demonstrated more than 580× speedup for Heath–Jarrow–Morton swaptions pricing, over 430× speedup for Value at Risk (VaR) on geometric Brownian motion processes, and over 80× acceleration for radiation transport simulations, compared with AWS r7iz instances. The UxHw technology and its implementation is covered by a growing portfolio of over 90 intellectual property filings in the US, China, Taiwan, Japan, and the EU. What the ASIC Will Enable Signaloid’s existing deployment of UxHw already provides multiple orders of magnitude speedup over the status quo. The C0-ASIC will permit even greater improvements in performance and energy-efficiency. “The kinds of compute workloads that Signaloid’s UxHw is designed for, pervade many aspects of robotics, physical AI, engineering, and quantitative finance,” says Phillip Stanley-Marbell, founder and CEO of Signaloid. “The C0-ASIC took the lessons we have learned from shipping our binary-translation-based and FPGA implementations of UxHw and making as efficient a silicon implementation as possible. The additional step-change in efficiency will make possible even more advanced algorithms like efficient probabilistic and Bayesian methods in robotics, which in turn could be the enabler of more adaptable and resilient physical AI.” An International Partnership The design and implementation were the result of a collaboration between Signaloid and world-leading design partners IC-Link by imec and US-based Cadence Design Systems. “Leading AI hardware innovators trust IC link as a key partner to bring their most advanced ASIC concepts through design and into production with our foundry partner TSMC,” says Ozgur Gursoy, Director Portfolio & Strategy for IC-Link’s ASIC services. “We are proud to have partnered with Signaloid in bringing the C0 Dreadnought ASIC from concept through the design cycle, enabling a new class of compute efficiency for distribution-enhanced computing applications.” Speaking of the partnership, John Heighton, sales group director, EMEA North and Central at Cadence, said, “Cadence sets the industry standard for enabling leading companies to tape out cutting-edge AI silicon, including Signaloid’s C0-Dreadnought, now in production at TSMC. We support startups advancing next-generation computing by delivering our high-performance Artisan SRAM memories for Signaloid’s ASIC.” Availability Engineering samples of bumped dies of the C0-ASIC will be available in Q3 2026. A 2-page preliminary design brief of the C0-ASIC is available immediately, for qualifying customers. Customers interested in robotics and industrial automation use cases will also be able to see the UxHw technology in action at the Bosch Connected World flagship event in Berlin, from 10th–11th June 2026.

Signaloid (https://signaloid.com) today announced the preview release of the Signaloid C0-microSD+33, an edge hardware accelerator module for robotics and trustworthy AI. The Signaloid C0-microSD+33 module eases the implementation of algorithms such as state estimation, sensor fusion, particle filters, Gaussian process models, trustworthy machine learning inference, and real-time uncertainty quantification. The module makes these algorithms easier to implement as well as providing orders of magnitude speedup in many use cases, enabled by the Signaloid UxHw® technology’s capability of performing arithmetic directly on probability distributions. The Signaloid C0-microSD+33 expands Signaloid’s edge hardware realizations of the Signaloid UxHw technology deployed in the enterprise-grade Signaloid Cloud Compute Engine, and follows on from the release in summer 2025 of the Signaloid C0-microSD starter module. While the starter module provided a cost-effective way for both professionals and hobbyists to get started with Signaloid's UxHw technology in edge-of-the-network applications, the Signaloid C0-microSD+33 delivers higher compute power and more embedded core memory within its microSD form factor, bringing Signaloid’s UxHw technology to production deployments that require the highest performance. Organizations can easily integrate these modules into the hardware and software of legacy platforms ranging from robotics to factory automation PLCs by inserting the device into a vacant microSD card slot in the embedded system. Signaloid will be previewing the Signaloid C0-microSD+33 module in AI/ML applications at Embedded World 2026, Nuremberg Messe, Hall 2, booth 2​​-412e, from 10 to 12 March.